• University of Buenos Aires: Electromechanical/Electronic Engineer (equivalent to MSEE).
• Many specific technical and management courses completed, foreign and domestic, before and after graduation for various employers.

• Married, father of four children (three already graduated from college); Argentine citizen, permanent US resident in Fremont, California
• Other languages: Spanish (native language), Italian (read, speak), Portuguese (read, speak).
  
• Enjoy skiing, jogging and reading.

• Bachelor of Science, Electronics Engineering Technology, California State Polytechnic University, Pomona, CA June 1986.
• Associate Of Science, Engineering Technology, City College of San Francisco, San Francisco, CA June 1984.

• Married, father of one boy; US citizen; born in Kenya, resident in San Bruno, California.
• Other languages: Swahili (read, speak).
• Enjoy running, outdoors and reading.

Working in a consulting-contracting basis at Essex Technology from February 91 to present time. Associated in ComSysDes venture since August 2000. The following are a sample of the numerous projects handled in Consulting / Contracting roles, in some cases concurently. The jobs usually included total responsibility for the design and production.

September 2001 to present. Manufactured PLX reference design kits. PCI 9052, PCI 9030, CPCI 9054 and CPCI 9030. The project included the creation of bill of materials, setting up approved vendor lists, purchasing components, printed circuit boards, kiting out each product and transferring it to manufacture. Managed and supervised the assembly, manufacture, test and delivery of each product.

Designed controlled impedance test boards for Vaishli’s bluetooth chip, 2.4GHz radio interface. Also, supervised the design of 12 GHz controlled impedance printed circuit board test fixture for Core Innovation.

June 2000 – September 2001. Designed and manufactured a test system for Nesflash’s FLASH memory devices. The design consisted of a mix of digital and analog hardware, microcontroller, CPLD and analog programmable power supplies. Created schematic design, transferred to netlist and created printed circuit board layout. Generated gerber plots and contracted out p.c.b. manufacture. Purchased components, and subcontracted out assembly of five test systems.

May 1999 – June 2000. Designed and manufactured prototype development boards for Lucent Technology’s OR3L FPGA. Designed JTAG interface to Lucent’s download module for FPGA configuration and readback. Designed and manufactured Triscend’s development board for the E5 configurable system on chip. Also, helped to design Triscend’s A7 32 bit ARM RISC processor development board. Entered the designs as a schematic and created the netlist. Imported the netlist to create a six layer printed circuit board for the A7, and a four layer board for the E5 chip. Transferred the gerber files to printed circuit board manufacture.

September 1998 - May 1999. Worked with Triscend on "in house" HDL design entry and synthesis tools for their FPGA and embedded controller chip. Wrote test programs to functionally test the embedded 8052 microcontroller. Designed and manufactured a test/emulator board for the E5 configurable system on chip. Wrote applications notes on how to design I2C and SPI interface protocols into the Triscend E5 chip.

November 1997 – August 1998. Designed a reprogrammable MCU Emulator system for Teragen Corporation. The design used two Xilinx XC4085XL devices programmed to control data path logic to and from banks of SRAMs. The design also incorporated FLASH based CPLD's to perform DMA activities. Data and executable files were downloaded/uploaded through a microcontroller interface to and from a graphical user interface running in an IBM PC. Schematic system level design done in OrCAD, Synplicity VHDL synthesis and Xilinx Alliance tools used for FPGA design and synthesis and routing tools, assembly language used for the development of microcontroller firmware. I supervised p.c.b layout of an eight layer board which was subcontracted out of house. Created gerbers and transferred the design to manufacture.

September 1997 – November 1997. Designed PCI interface system in a laser control application for Lasertronics. The design consisted of a PLX PCI bridge 9050 chip and an Altera EPLD EPM9480, to interface to MAXIM A/D and D/A and OP-AMPS to drive the laser and receive x, y, position and velocity information. My main task was to design the system hardware, prototype and test the analog circuitry and supervise p.c.b. layout to a finished product.

September 1997. Development of PCI interface system for Philips semiconductors' PZ960 CPLD (Cool runner). Created a schematic design and printed circuit board layout. Transferred the gerber files to manufacture of a four layer PCI form factor printed circuit board.

March 1996 - September 1997. An eighteen month contract with Hewlett-Packard on the development and testing of a Motorola M68331 embedded control system for interface to a GPS engine for the generation of a one pps for precise timing control. Synthesised VHDL design entry into CPLD devices to lock instruments under test to the house standard 10MHz, at one pulse per second.

January 1992 - March 1996. Designed and manufactured VLSI Technology's amorphous silicon link(anti-fuse) test system to support their embedded vROM technology. Performed all the digital and analog circuit design. Also, as principal designer I also managed software consultants, mechanical engineers, printed circuit board designers and assembly operators to carry the project through. In addition set up distributors for supply of hardware material and components. This project has been going off and on for about four years, as specifications and linking algorithms have been developed.

October 1993 - September 1994. Wrote a VHDL description of an enhanced version of the NEC7210 GPIB 488 Talker/Listener/Controller chip to be synthesized into a Xilinx 4010 series FPGA the project included the writing of command files for simulation. Used Exemplar Logic and Model Technology tools.

May 1993 - September 1993. Designed and manufactured AT&T's ORCA FPGA evaluation system and download module.

March 1993 - March 1994. Completed a system level design of an embedded Intel 386EX M.C.U., based controller system for automatic CD ROM duplication. Designed the complete system from initial specifications through to production. The system is currently working at Microtech Conversion Systems in Belmont.

February 1991 - February 1993. Worked with Exemplar Logic on their VHDL synthesis program in the early 90's. Developed test cases to evaluate the synthesis tools, wrote a number of applications for testing and evaluation and synthesis into FPGA devices. Wrote test benches and command files, using Model Technologies simulation tools to evaluate results on P.C. and Sun Workstation.

Tools used: XILINX Foundation VHDL/Verilog synthesis tools, functional simulator, back annotation and timing simulation. Exemplar Logic's synthesis tools into FPGA, Model Technologies simulation tools. Cypress WARP VHDL design entry and simulation for Cypress CPLD's. Viewlogic schematic capture, Viewsim, Viewave, OrCAD Express capture and synthesis, OrCAD p.c.b., LAYOUT PLUS. Synplicity Synthesis tools. AHDL (Altera) design entry and simulation. Data I/O ECS schematic capture. PALASM, CUPL. Microcontroller (Intel 8051 8052, Philips XA51, Motorola 6805, 6807, 68HC11, Zilog Z80) ‘C’, Assembler and simulation tools. Used Multisim simulation tools for analog circuit simulation.

Other Relevant Experience: References and public samples of work available upon request for:

WSI. (Applications Manager: January 1989 - February 1991); AMD/MMI (Applications Manager: January 1987 - January 1989); MMI (Applications Engineer: May 1986 - January 87); MMI U.K. (Field Applications Engineer. May 1983 - May 1986); Consultant Systems Designers U.K. (March 1982 - May 1983); Fairchild U.K. (Applications engineer. January 1980 - March 1982); Linotype U.K. (Design Engineer. October 1978 - January 1980); Texas Instruments U.K. (Logic Designer. June 1977 - October 1978).

• BSc(hons) Electronic Engineering. Essex University U.K. June 77.
• Numerous specific courses on theory, software and hardware tools, as independent consultant or as part of employer sponsored education.

Sr. Mechanical Consultant: 1999-present: ComSysDes LLC (Fremont, CA). Associated in ComSysDes venture since August 2000.

Mechanical Consulting Service: 8/1997-8/1999 (Emeryville, CA) Performed design and calculations for valve and pipe fittings in oil and gas industry. Responsibility for the implementation of customer design requirements. Released drawings and documentation for prototype fabrication and followed up to prototype approval

Sr. Mechanical Engineer 7/1990-7/1996: Grove Valve & Regulator Co (Emeryville, CA) Design sheet metal chassis, boards and faceplates for the telecom industry following standards for Central Office environment.

Mechanical Designer 1/1998-3/1990 – Geo M. Martin (Emeryville, CA) Developed layout and drawings of machine components, both mechanical and electrical. Prepared documentation for new products, details, assembly drawings.

Mechanical Designer 9/1983-12/1987 - Advanced Products Industry (Mountain View, CA) Performed a wide variety of mechanical tests, measurements and calculations. Environment was Architectural, Engineering, and Related Services.

• · Mechanical Engineering degree (Polytechnic College, Warsaw, Poland)

• · Autodesk VIP member since May 1998

• · Married, one child
• · Volunteer in community educational activities

• Certificate of Achievement at NASA Ames’ Space Science Division.
• Student winner of the annual Division of Dynamical Astronomy student thesis contest (gave a talk at the 1996 Division of Dynamical Astronomy’s 1996 Washington D.C. meeting).
• Several published papers in the topics of orbital dynamics

• Master of Science, Physics (Concentration in Computational Physics), San Jose State University, August 1996.
• Bachelor of Arts, Physical Sciences, University of California at Berkeley, May 1993.

• Amateur astronomer.
• Enjoy soccer, computing, swimming, skiing, photography, playing the guitar and reading.
• Other languages: Very fluent in Spanish (native speaker). Read, write and speak Russian.

• Managed application and system verification test groups on different releases for Call Application Unified voice messaging projects.
• Managed for supporting the field and development groups to analyze and reproduce the customer problem that occurred in the field.
• Managed and supported the corporate voice mail system.
• Managed the remote PQA group in Bangalore (India) site and he was responsible for disassembling and moving two entire Lucent PQA labs to Bangalore (India).

• Responsible for testing, fault-isolation, and debugging problems at the module, component and a system level comprising RSC (Radio/Switch controller), MBS (Modular Base Station), SMS (System Management Software), SLSU (Single Line Subscriber Unit), MLSU (Multiple Line Subscriber Unit) and third party equipment such as: DLC, Telco E1 back-haul.
• Involved in maximum call capacity testing of the system (Voice, Fax, Data) using Automated test tools.
• Performed RF testing using HP 8595A spectrum analyzer, telephone parameter testing using Ameritec AM8E call analyzer and TIMS tool.
• Wrote the Procomm scripts and QuickLink for Data and Fax automation testing.
• Provided remote and on-site technical support to field teams at China Xingjang Province and Kazakhstan.

• Responsible for development of test plans and methodologies for pricing, quoting, and configuration Windows-based GUI Off-Line Tools for the Siemens PBX.
• Wrote scripts for Off-Line tools using SQA.
• Project lead for Digital and analog trunk on ROLM and Siemens PBX systems.
• Project lead VRU (Voice Response Unit) interfacing with IBM host, CallPath and ROLM Phone Mail and Automatic call distribution.

• BSEE, State University of Long Beach, California.
• MSEE (in Digital signal processing & Filter Design) from State University of Long Beach, California.
• Other Training and Achievements: ROLM CBX 9751 Maintenance, VRU (Voice Response Unit), ISDN and T1 Carrier Seminar, Signaling System #7, Catapult, Hammer, Voice over IP class, Management courses.

• Other languages: Fluent in Farsi (native language), fairly fluent in Turkish.
• Personal Data: US citizen, team player, flexible.

• John Moore spent 10 years working at equipment manufactures in the Silicon Valley, California, including pioneers such as Brocade and David Systems, as an Electronics Hardware Engineer. He then went on to obtain his Masters in Business Administration from the University of Rochester with an emphasis on Marketing and Finance.
• As an electrical engineer John has led the successful development of several data communications products. His recent work has been in business development and includes the sales and marketing of engineering services.
• Past successes have included sales, promotion, and support of capital equipment, patented processes, and software. John has worked in several industries including those involving semiconductor manufacture, consumer electronics, information technology datacenter, nutritional supplement, and plastics.
• Since the year 2001, John has been engaged full-time in technical marketing as a sales representative.

• Bachelor of Science in Electrical Engineering (BSEE) from Oakland University, Michigan.
• Masters in Business Administration from the University of Rochester

• VHDL Logic Design targeting Altera and Xilinx
• Visual Basic Programming
• FPGA, EPLD, and CPLD Design and Simulation
• AutoCAD LT2000i and Visio
• Schematic capture using Orcad, and PADS PowerLogic
• Microsoft Project
• Database management using Agile and Relex
• Analog circuit simulation using MicroSim PSpice
• Microsoft Excel, Word, PowerPoint
• RF circuit simulation using Eagleware Genesys
• Manual and computer-based Smith Charts (impedance matching, etc.)
• Linux and C language enthusiast
• Experienced with most types of digital, analog, microwave and telecommunications test equipment, including logic analyzers, spectrum analyzers, network analyzers, digital and analog oscilloscopes, power meters, noise figure meters, signal generators, multipath fading simulator, and BER and PER Data Transmission Test Sets
• Familiar with multiple microprocessors (Microchip 16F877 PIC Processor, Intel - AMD 80C196, Motorola 68HC11, etc.)

• Chaired New Product Proposal meetings, as well as managed weekly progress meetings with engineering teams.
• Supervised standard functional, and environmental testing of prototypes and pilot runs.
• Designed combinatorial and sequential logic utilizing the VHDL development language, targeting Altera and Xilinx FPGA, EPLD, and CPLD devices applied to RF projects.

• Bachelor of Science degree, San Jose State University, August 1996.
• Certificate in C Language Programming, 23 units, UCSC Extension.
• Award in TCP/IP and Internetworking, 12 units, UCSC Extension.
• Sabbatical year in 2003 to expand knowledge on several technical disciplines
• Altera VHDL seminar, and Digital Design Using VHDL, UCSC Extension.

• Amateur Radio Operator since age 13, Amateur Extra Class License, N6VM.
• First Class Radio Telephone License, since age 19.
• Private Pilot - Single Engine Land – Passed FAA Instrument Rating (IFR) knowledge test (written) with 90%.

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